Powerlink For Mac

1. Powerlink Machine Uk
2. Powerlink For Mac Download

The straton development kit for POWERLINK is a package for OEMs creating a new product range base on the Linux, QNX or VxWorks operating system. The straton runtime is a basic component from COPALP enabling unlimited possibilities for the OEMs as for end-users. The OEMs beneficiate of a large range of supported communication protocols (IEC61850, IEC61400, IEC60870, DNP3, POWERLINK), the integration of their hardware specific features and an integrated softPLC engine. The end-users can easily create and configure its application using the universal straton Integrated Development Environment that includes editors for the IEC61131-3 language, online debugging tools, a soft scope, fieldbus configuration tool, POWERLINK configuration and a B&R IOs configuration tool.

REAL-TIME-ETHERNET-KIT BOX

FIGURE2: POWERLINK cycle with Poll-Response Chaining 2.3 Synchronization Parameters Because of the POWERLINK communication princi-ple there is one critical timing parameters in a POW-ERLINK communication cycle, the SoC Jitter. The MN generates the SoC frame to start a new POWERLINK cycle. For a software solution the ac. POWERLINK Basics. POWERLINK is a protocol expansion to the Ethernet standard according to IEEE 802.3 for transmission of real-time date in the microsecond range. POWERLINK is found most frequently in the transfer of process data in automation technology. The Characteristics of POWERLINK are.

• Complete test and evaluation system
• Evaluate performance and function
• Test system for developing your own devices
• Measure the real-time values

The Kit is suitable for development and test laboratories as well as for training purposes. It can be used to build up a complete communication system for all Real-Time Ethernet systems. With the included netANALYZER, the performance and function of individual systems or system components, that operate according to Ethernet II IEEE 802.3 specification or corresponding bus systems, can be displayed.

The netX SoC architecture is designed from the ground up for the highest demands on flexibility, determinism and performance in terms of multi-protocol capability and low latency for short cycle times. The heterogeneous multi-core architecture features an ARM processor core, coupled with a xC (flexible communication) subsystem and a feature-rich set of on-chip peripherals for varieties of industrial applications.
The netX family spans a broad portfolio of network controllers for industrial markets.
The network access controller is based upon the successful netX family and intended for use by customers who wish to fully control and run their software protocol stack at the host site. The netX 6 is the ideal companion chip for industry-proven embedded processors to enable access to multi-protocol network features for real-time control industrial communications.
Hilscher offers customers a scalable family of netX products for slave type applications. The higher end is represented by the netX 51 which provides an external memory interface with a high-performance, multi-channel and multi-cache controller suitable for the development of cost-sensitive stand-alone applications. The netX 52 is suited for customer designs that require a multiprotocol-capable companion chip solution with host interface that fully carries out the real-time control communication tasks for industrial Ethernet. At the lower end is the netX 10 with one xC channel that commercially addresses traditional fieldbus technologies.
Hilscher offers customers a scalable family of netX products for master and slave type applications. The netX 100 is typically used for the design of companion chip solutions or stand-alone applications. The netX 500 with integrated graphics controller and feature-rich on-chip peripherals is the ideal development platform for application designs that make use of embedded visualization, industrial control and system network.

netX Guided Development

From concept to certified device. With the netX network controller family, Hilscher offers a broad range of communication technology in the industrial automation market. Thus, Hilscher is more than a chip supplier. We can fully support you along the way from concept to a completed, certified device.
This includes everything from a first concept meeting, followed by basic trainings, review of the hardware design through to device certification support. We offer workshops for locating and solving software problems.

• Reduction of your training period
• Support in every development stage
• Avoid mistakes by exchanging know-how
• Benefit from our development experience
• Fast 'time to market'

The netANALYZER is a tool for the simple analysis of Real-Time Ethernet networks. The scope of delivery includes a capture-hardware for recording the telegrams on the network as well as a graphical user software for Windows with extensive analysis functions. The open driver API also allows you to use the capture-hardware in your own custom applications. Integrated Ethernet Test Access Points (TAPs) ensure the absence of reaction on the Ethernet network during the measuring process. There is no relevant additional telegram delay; a TAP physically corresponds to an Ethernet cable of only a few millimeters additional length. The measuring accuracy of 10 ns meets the high requirements of time-synchronized protocols such as IEE1588, PROFINET IRT, EtherNet/IP with CIP Sync, EtherCAT or Sercos. The supplied software allows an easy control of the recording process. The most important analysis functions such as timing and network load analysis have already been integrated in the software. In addition, up to four digital switching signals of the same time resolution can be recorded in parallel to the Ethernet signals. This allows an easy comparison of network traffic and the action or reaction of switching events. For a more detailed analysis of the recorded data, the software enables you to store files in the Wireshark.pcap format and to record data directly from Wireshark. The portable netANALYZER with its solid metal housing is an ideal tool for laboratory development or field set-up and troubleshooting.

Hilscher Gesellschaft für Systemautomation mbH

netIC – POWERLINK as compact DIL-32 module

netIC is a complete ‘Single Chip Module' in the dimensions of a compact DIL-32 IC. It is based on netX 50 network controller and contains all network specific components of a Fieldbus or Real-Time Ethernet interface with integrated 2-Port Switch and Hub.
Data exchange to the host process is carried out via a simple serial port and all major Real-Time Ethernet protocols are supported as Slave on a single hardware.
Hilscher Gesellschaft für Systemautomation mbH

comX is a complete network interface in the standardized compact dimension of 30mm x 70mm. It is based on netX network controller and contains all network specific components, like 2-Port Switch, Hub and connector. Data exchange to the host is carried out via 16kByte Dual-Port Memory and all major Real-Time Ethernet protocols are supported as Master or Slave on a single hardware.
Hilscher Gesellschaft für Systemautomation mbH

netJACK – POWERLINK as Exchangeable Module

netJACK is a complete network interface as closed IP 40 module. It is based on netX technology and can be mounted via slide-in mechanism without tools at any point of the delivery chain. Data exchange to the host is carried out via PCI Express Bus or traditional Dual-Port Memory. All major Real-Time Ethernet protocols are supported as Master or Slave on a single hardware.
Hilscher Gesellschaft für Systemautomation mbH

Besides its wide product range, HMS offers hardware and software development services and delivers customer specific hardware and OEM products in large quantities:
Spotflux chrome.

• Development of customer specific hardware components and embedded system solutions for POWERLINK
• POWERLINK protocol implementation
• Development of configuration and service tools
• Consulting, research studies, system designs, training

icPLINK openPOWERLINK for QNX

BV provides a software solution for the implementation for the implementation of the Ethernet POWERLINK communication protocol running on the real-time operating system QNX.
The communication stack is based on the open source package 'openPOWERLINK'. The Ethernet communication can be performed with help of the QNX network driver for standard applications. As an option, IBV provides optimized link layer drivers (e. g. for TI Sitara) to achieve shorter cycle times and lower CPU load.
Features:

• Support of Managing Nodes (MN) and Controlled Nodes (CN)
• Configuration of the POWERLINK network via a CDC file
• Cyclic communication via PDOs
• Asynchronous communication via SDOs in POWERLINK frames or UDP telegrams
• Support of 'Managing Node Redundancy'
• Support of a virtual Ethernet interface in the QNX network stack
• Implementation in ANSI C
• Supported operating systems: QNX 6.5 SP1, QNX 6.6, QNX 7.0
• Supported hardware architectures: x86 (32-bit, 64-bit), ARM

The source code can be licensed per project for a one-time fee.As a competent partner for software development and real-time operating systems, IBV provides 'all-in-one' services for embedded projects. IBV provides software engineering services for development (drivers, board support packages and applications) as well as integration, support and consulting.

openCONFIGURATOR is an open-source configuration tool for easy setup, configuration and maintenance of any POWERLINK network. openCONFIGURATOR ideally complements openPOWERLINK, the open source POWERLINK protocol stack for master and slave. Please visit sourceforge.net/projects/openconf/ to download the binary/source versions.

Development Services

Focused on POWERLINK Integration Worldwide
Kalycito has helped OEMs across the globe integrate POWERLINK into their products. Case studies include supporting a machine builder in France on POWERLINK Master integration for a real time I/O and simultaneous image transmission, developing and integrating a POWERLINK Slave IP for a camera manufacturer from US, providing consulting services for a customer in Israel for integrating POWERLINK
as the communication backbone of their product. Kalycito is also actively helping open source users of POWERLINK via online forums. It is also working with leading chip manufacturers to integrate POWERLINK into their cutting edge designs.
POWERLINK Product & Services Overview
Hardware: ARM, Xilinx and Altera based FPGA POWERLINK Master and Slave solutions with driver support for Linux and Windows.
Software: openPOWERLINK stack and openCONFIGURATOR on Windows, Linux and Non-OS platforms. POWERLINK optimized drivers for specific Ethernet cards, IP design and integration services for Altera and Xilinx FPGA based MN/CN.
Design Support: Services to enable faster time to market for OEM Customers and delivering POWERLINK based technology reference designs for chip vendors and board manufacturers.
Additional Offer: Product Conceptualizing, Electronic Hardware Design, Embedded Software Development, Product Validation and Maintenance Services.

Specifications:

• POWERLINK version 2
• 2 Ethernet ports
• RPDO and TPDO size each up to 240 bytes
• 512 bytes each input and output data
• Min. cycle length: 250-750 μs
• XDD file
• STM32 ARM Cortex M3
• Freely configurable via Modbus RTU and terminal
• Integrated LEDs on the circuit board
• External dimensions 85 x 65 mm
• Plug (Industrial Ethernet) as RJ45 or as POF
• Tested and certified modules
• ERNI MSC plug connector to the application with 32 pins
• Uniform pin-out to the application
• Galvanic separation of bus and application up to 1.5 kV
• Low power consumption
• Power supply at 3.3 V
• CDI (Config, Debug, Status) service interface
• Parameter changes during operation are possible.

Application interfaces:

• SPI (shift register interface)
• MODBUS RTU (Baud rates adjustable up to 38.4 kBaud)
• Dual port RAM

Customized development of interface modules meeting your industry-specific requirements for connection to Ethernet POWERLINK networks is an option we also provide in this context.

LARnet for ETHERNET POWERLINK

LARnet is a tool for analyzing and configuring ETHERNET POWERLINK devices in an EPL network.Key features:

• Displaying EPL frames
• Loading and editing of EDS-Files
• Access to devices object directory via Service Data Objects services (SDO)
• Reading an object
• Writing an object
• Controlling the network with Network Management Services (NMT)
• Scanning the EPL network
• Action editor for programming of user specific tests and control applications in .NET (C# and Visual Basic)

• Consulting (Feasability studies, market research, competitor analysis, product definition Functional Safety)
• Product development (Hardware & Software, Functional Safety, Explosion-proof)
• Custom-specific POWERLINK and openSAFETY implementations
• Design-in-services (e.g. Hilscher netSafety-Module)
• Function & compatiblity test

icPLINK openPOWERLINK for QNX

BV provides a software solution for the implementation for the implementation of the Ethernet POWERLINK communication protocol running on the real-time operating system QNX.
The communication stack is based on the open source package 'openPOWERLINK'. The Ethernet communication can be performed with help of the QNX network driver for standard applications. As an option, IBV provides optimized link layer drivers (e. g. for TI Sitara) to achieve shorter cycle times and lower CPU load.
Features:

• Support of Managing Nodes (MN) and Controlled Nodes (CN)
• Configuration of the POWERLINK network via a CDC file
• Cyclic communication via PDOs
• Asynchronous communication via SDOs in POWERLINK frames or UDP telegrams
• Support of 'Managing Node Redundancy'
• Support of a virtual Ethernet interface in the QNX network stack
• Implementation in ANSI C
• Supported operating systems: QNX 6.5 SP1, QNX 6.6, QNX 7.0
• Supported hardware architectures: x86 (32-bit, 64-bit), ARM

The source code can be licensed per project for a one-time fee.As a competent partner for software development and real-time operating systems, IBV provides 'all-in-one' services for embedded projects. IBV provides software engineering services for development (drivers, board support packages and applications) as well as integration, support and consulting.

openCONFIGURATOR is an open-source configuration tool for easy setup, configuration and maintenance of any POWERLINK network. openCONFIGURATOR ideally complements openPOWERLINK, the open source POWERLINK protocol stack for master and slave. Please visit sourceforge.net/projects/openconf/ to download the binary/source versions.

Development Services

Focused on POWERLINK Integration Worldwide
Kalycito has helped OEMs across the globe integrate POWERLINK into their products. Case studies include supporting a machine builder in France on POWERLINK Master integration for a real time I/O and simultaneous image transmission, developing and integrating a POWERLINK Slave IP for a camera manufacturer from US, providing consulting services for a customer in Israel for integrating POWERLINK
as the communication backbone of their product. Kalycito is also actively helping open source users of POWERLINK via online forums. It is also working with leading chip manufacturers to integrate POWERLINK into their cutting edge designs.
POWERLINK Product & Services Overview
Hardware: ARM, Xilinx and Altera based FPGA POWERLINK Master and Slave solutions with driver support for Linux and Windows.
Software: openPOWERLINK stack and openCONFIGURATOR on Windows, Linux and Non-OS platforms. POWERLINK optimized drivers for specific Ethernet cards, IP design and integration services for Altera and Xilinx FPGA based MN/CN.
Design Support: Services to enable faster time to market for OEM Customers and delivering POWERLINK based technology reference designs for chip vendors and board manufacturers.
Additional Offer: Product Conceptualizing, Electronic Hardware Design, Embedded Software Development, Product Validation and Maintenance Services.

Specifications:

• POWERLINK version 2
• 2 Ethernet ports
• RPDO and TPDO size each up to 240 bytes
• 512 bytes each input and output data
• Min. cycle length: 250-750 μs
• XDD file
• STM32 ARM Cortex M3
• Freely configurable via Modbus RTU and terminal
• Integrated LEDs on the circuit board
• External dimensions 85 x 65 mm
• Plug (Industrial Ethernet) as RJ45 or as POF
• Tested and certified modules
• ERNI MSC plug connector to the application with 32 pins
• Uniform pin-out to the application
• Galvanic separation of bus and application up to 1.5 kV
• Low power consumption
• Power supply at 3.3 V
• CDI (Config, Debug, Status) service interface
• Parameter changes during operation are possible.

Application interfaces:

• SPI (shift register interface)
• MODBUS RTU (Baud rates adjustable up to 38.4 kBaud)
• Dual port RAM

Customized development of interface modules meeting your industry-specific requirements for connection to Ethernet POWERLINK networks is an option we also provide in this context.

LARnet for ETHERNET POWERLINK

LARnet is a tool for analyzing and configuring ETHERNET POWERLINK devices in an EPL network.Key features:

• Displaying EPL frames
• Loading and editing of EDS-Files
• Access to devices object directory via Service Data Objects services (SDO)
• Reading an object
• Writing an object
• Controlling the network with Network Management Services (NMT)
• Scanning the EPL network
• Action editor for programming of user specific tests and control applications in .NET (C# and Visual Basic)

• Consulting (Feasability studies, market research, competitor analysis, product definition Functional Safety)
• Product development (Hardware & Software, Functional Safety, Explosion-proof)
• Custom-specific POWERLINK and openSAFETY implementations
• Design-in-services (e.g. Hilscher netSafety-Module)
• Function & compatiblity test

Open Source Automation Development Lab (OSADL)

One of the services the Open Source Automation Development Lab (OSADL) is providing to its members and to the community consists of continuously monitored systems in the OSADL QA Farm. In addition to performance and determinism data, external communication lines are tested such as a bi-directional communication between POWERLINK peers. The resulting round-trip time is displayed continuously at the OSADL website as shown in the picture. The result clearly indicates that the jitter of the 500 μs cycle interval never exceeds 30 μs and thus fulfills most industrial requirements. A description of the test set-up is given at the QA Farm overview.
OSADL

Powerlink Machine Uk

The POWERLINK EDS-Editor is a tool for the rapid and cost-saving creation of POWERLINK device description files (also know as EDS files) (new XML format). Furthermore it creates a detailed documentation of the parameters in HTML.
With the POWERLINK EDS-Editor a tool is available, which frees the developer from error-prone and repetitive tasks. It guarantees the consistency of the Electronic Data Sheet and the documentation. By default the POWERLINK communication profile is delivered with the tool. In addition to the POWERLINK specific communication database other databases are provided for the CANopen device profiles DS 401, DSP 402, DSP 406 and DSP 417. The POWERLINK EDS-Editor eases the first step into the POWERLINK protocol and device development is accelerated.
port GmbH

POWERLINK Protocol Stack

The POWERLINK Library is based on the EPL communication profile. It provides the most important services specified therein. It is completely written in ANSI-C and can be compiled with every ANSI-C compliant compiler. Depending on the required scope of functionality the POWERLINK Library is available in different expansion stages. With the standard Controlled Node version of the POWERLINK Library all services are provided for develop ment of full-featured CN devices. The functionality of the Managing Node as well as the convenient node monitoring functionality is provided by a different product. All hardware specific parts are decoupled from the POWERLINK protocol stack through a defined driver interface. The development process is supported by the POWERLINK Design Tool.
port GmbH

The POWERLINK hub from port is a generic hub for Xilinx FPGAs and PLDs written in VHDL. The propagation delay of 390 ns is far inferior to the time, which is claimed in the IEEE 802.3 standard. The 3-port hub features two external and one internal interface. The number of PHY ports can be expanded easily. By integrating the hub in an POWERLINK device, it can be simply integrated in POWERLINK networks with a daisy chain. Qr code generator plugin available for mac. An external hub is not required and extensive cabling is not applicable. In conjunction with port's POWERLINK MAC, a highly optimized VHDL POWERLINK MAC controller for Xilinx-FPGAs and PLDs, a fast connection to your POWERLINK network is reached. This results in fast response times of Controlled Nodes.
portGmbH

POWERLINK Design Tool (EDT)

The POWERLINK Design Tool is a tool for the rapid and cost-saving development of POWERLINK applications or devices. It administers device databases, from which an object dictionary and an initialization function in C-code, an Electronic Data Sheet (XML format) and the documentation are produced automatically. Furthermore it simplifies the configuration of the EPL Library and of the POWERLINK Driver Packages. In addition to the POWERLINK specific communication database other databases are provided for the CANopen device profiles DS 401, DSP 402, DSP 406 and DSP 417. The object dictionary produced by the POWERLINK Design Tool supports numerous options of the POWERLINK Library from port, e.g. segmented structuring. The POWERLINK Design Tool eases the first step into the POWERLINK protocol and device development is accelerated.
port GmbH

port GmbH has been active in the field of development services since its foundation in 1990. A great number of our products are the result of such development projects and customer requirements. We would like to offer you to profit from our know-how in communication protocols and their application:

• software development for embedded systems
• consulting services to choose appropriate components and design
• integration of Ethernet communications into products, based on processors or recent FPGA technology with independent IP cores
• consulting services for product development and system design
• trainings on our products and the different communication protocols

POWERLINK PE2MAC IP Core for FPGAs

The POWERLINK Enhaced Ethernet MAC Controller (PE²MAC) developed by port is a special MAC controller optimized for Ethernet POWERLINK for FPGAs.

Through several special transmit buffers and the possibility to respond automatically to POWERLINK frames by hardware, extremely short response times are reached. Special receive filters allow pre-filtering of POWERLINK messages by the MAC controller and releases the software from this tasks. These filters support the pre-selection of Ethernet frames, that are needed by the processing software. Based on the used settings only those frames that match the filters are stored in the receive buffers. This mechanism releases the CPU from processing frames not relevant for the software.

Ethernet POWERLINK Integration into Field Devices

IP Core and Protocol Software have been adapted to implement an Ethernet POWERLINK communciation based on a hardware supporting an Ethernet interface and an Altera FPGA. This solution provides uniform interfaces for supporting additional Industrial Ethernet protocols at a later stage.

The Ethernet POWERLINK firmware comes ready to integrate and allows the flexible implementation of additional Industrial Ethernet functionality at any time. Additional protocols can be added upon special request. The IP Cores provide two independent Ethernet interfaces to support different topologies according to the relevant Industrial Ethernet standard. This solution is already implemented by our customers. Further information

Highlights:

Powerlink For Mac Download

• Maximum Security of Investment Through Universal Firmware
• Short Time-to-market Through Timesaving Integration
• Functional Competitive Advantages Through Variable Integration into the IT World

Integration Services

Softing was founded in 1979 and has many years of experience in the field of integration services, which we offer in the following areas:

• Development of customer-specific hardware components and embedded systems solutions for POWERLINK
• POWERLINK protocol implementation via POWERLINK protocol stack or IP core
• Consulting services to meet customers requirements in product development and system design
• Integration of Ethernet communications into products, based on processors or recent FPGA technology with independent IP cores

The FPGA RTEM CIII consists of FPGA-based hardware with uniform software interface for integrating Real-Time Ethernet (RTE) protocols, e.g. POWERLINK into field devices. This communication module meets the requirements of all Industrial Ethernet technologies. Advantages are:

• Maximum Security of Investment through Universal Hardware
• Short Time-to-Market through Time-Saving Integration
• Functional Competitive Advantages through Variable Integration into the IT World

In addition to the universal hardware, the FPGA RTEM CIII features a uniform software interface for the current standard solutions. The Simple-Device-Application-Interface (SDAI) is an efficient protocol abstraction layer that is designed to offer a single application interface for the standard solutions helping to significantly speed-up device integration and time-to-market, while simplifying support and maintenance. The SDAI is designed to support single and dual processor systems.

Furthermore, the Transparent IT Channel provides access to embedded IT applications through the same communication interface and operates simultaneously to the real-time communication. These applications, e.g. web server, email, or even customer specific services, can run either on the module or directly in the device.

Highlights:

• Isochronous real-time data exchange with cycle times up to 400 µs and fast response times ≤ 3 µs
• 'Single chip'-solution for POWERLINK Controlled Nodes based on an Altera Cyclone III FPGA
• Host connection via shared memory interface or serial port
• Delivery including Host API and demo application
• Integrated 2-port hub with RJ45 connectors
• Support of various other Industrial Ethernet protocols

SPEAr-07-NC03

Ethernet-MAC and US
The SPEAr Net Evaluation Board lets you evaluate STMicroelectronics' SPEAR-07-NC03, a smart Communication Controller for Universal Serial Bus (USB) and Ethernet communications (Starter kit order code: STEVAL-SPEARNET). The SPEAR-07-NC03 enables the sharing of full speed USB host, IEEE1284 or Universal Asynchronous Receiver Transmitter (UART) peripherals within an Ethernet system.
This document explains how to easily get started on developing applications for an Ethernet system that uses various communication interfaces. The 12 V AC/ DC board supply voltage provides 1.8 V, 3.3 V and 5.0 V output voltage ranges. 14-pin and 20-pin JTAG connectors makes developing your applications easier. For information on the SPEAr Net operating system, software d. and application development, refer to UM0195.
STMicroelectronics

The STR910 evaluation board (STR910-EVAL) is a complete development platform for the STMicroelectronics' ARM® core-based STR91xF. Based on the ARM966ES core, the STR91xF includes Pre-fetch Queue and Branch cache, full speed USB 2.0 compatible port, Ethernet 100/10 interface, Embedded MAC, CAN 2.0B compliant interface, a large Dual Bank Flash memory, a large SRAM and many peripherals.
It includes an STR910F microcontroller and preloaded demonstration software and a full range of hardware features to help you evaluate device peripherals (Motor control, IrDA, USB, Ethernet, CAN, … etc.) and develop your own applications. Extension headers make it possible to easily connect a daughter board or wrapping board for your specific application.
User manual code: UM0174
STMicroelectronics

POWERLINK Protocol Stack Source Code

The SYS TEC POWERLINK Protocol Stack was designed under Real-Time aspects as a modular software component.The key features are:

• Data link layer and N
• MT state machine for Controlled and Managing Nodes
• Configuration Manager
• SDO via UDP and EPL ASnd frames
• Dynamic PDO mapping
• User-configurable object dictionary
• Implemented in plain ANSI C
• Modular software structure for simple portability to different target platforms (with and without operating system)
• Event driven communication abstraction layer
• Common API to application programAdditionally, we offer an EPL Starter Kit consisting of a development board with Freescale Coldfire processor, Linux BSP and an evaluation version of the ETHERNET POWERLINK Protocol Stack.

With their AM335x microprocessor family, Texas Instruments have announced an important step toward easier design of industrial automation applications through higher integration of functionality for that market, including real-time communication via POWERLINK. This microprocessor family is cost-effective enough for use in generic I/O devices and has the power and graphics support required in controlling and HMI systems.What makes it most attractive for industrial control designs is its integrated support for Industrial Ethernet. It features both master and slave functionality for POWERLINK. Communication is performed by the integrated Programmable Real-time Unit (PRU), utilizing the Open Source POWERLINK stack. This guarantees POWERLINK's uncompromised real-time properties without charging the CPU with the extra load.

16-core xCORE-Analog multicore microcontroller (XS1-A16-128)

XMOS xCORE-Analog devices provide low latency, deterministic processing with integrated analog peripherals. The xCORE DSP instructions can be utilized for filtering and conditioning the data, before sharing via a wide range of software-defined interfaces. Supporting power management functionality such as deep sleep, power consumption can be reduced to just 500uW.
XMOS

The Institute of Embedded Systems is the one-stop shop for development and support for the implementation of Real-Time Ethernet communication protocols, specifically ETHERNET POWERLINK.
We offer our project partners access to RTE stacks, porting services, acceleration technology, hardware and software design services as well as general consulting and training services.
Our success stories include:

• Founding member of the ETHERNET POWERLINK Standardization Group
• First ETHERNET POWERLINK software stacks
• First ETHERNET POWERLINK development kits
• First ETHERNET POWERLINK timing analyzer
• First ETHERNET POWERLINK hardware acceleration technology
• First ETHERNET POWERLINK redundant node

PowerConform

MultiNet is a standard PCI card used for the evaluation, validation and measurements on Real-Time Ethernet (RTE) networks and especially suited for POWERLINK. It boasts 3 Ethernet connections, jumpered as either standard Ethernet connections or passive-sniffer allowing the user to unobtrusively sniff RTE networks. A FPGA contains appropriate technology ranging from a simple hub right through to RTE accelerator technology, for instance EPL Express, whilst the local ARM-Processor handles all RTE protocols. MultiNet is one of a series of licensable technologies developed by the Institute of Embedded Systems enabling an easy entry into the exciting RTE market.
Zürcher Hochschule für Angewandte Wissenschaften

MultiNet is a standard PCI card used for the evaluation, validation and measurements on Real-Time Ethernet (RTE) networks and especially suited for POWERLINK. It boasts 3 Ethernet connections, jumpered as either standard Ethernet connections or passive-sniffer allowing the user to unobtrusively sniff RTE networks. A FPGA contains appropriate technology ranging from a simple hub right through to RTE accelerator technology, for instance EPL Express, whilst the local ARM-Processor handles all RTE protocols. MultiNet is one of a series of licensable technologies developed by the Institute of Embedded Systems enabling an easy entry into the exciting RTE market.
Zürcher Hochschule für Angewandte Wissenschaften

High Resolution Timing Analyser

The High Resolution Timing Analyser (HRTA) is a unique device for making measurements on Ethernet networks and optimized for Real-Time Ethernet protocols (RTE). With a resolution of 20 ns it is possible to timestamp every packet on the wire. The physical interfaces are passive, meaning the HRTA can be inserted between two devices without using a hub/switch. It is possible to trigger on specific packets and even external digital inputs. The device can be used in both the laboratory and in the field.

• 2x 10/100 Mbps monitoring (Ethernet-) interfaces
• additional 10/100 Mbps (Ethernet-) interface for measurement functions
• 1x 10/100 Mbps (Ethernet-) interface for control functions
• 8x digital in, 4x digital out
• 20ns resolution

The HRTA technology is available for licensing.
Zürcher Hochschule für Angewandte Wissenschaften

POWERLINK Express is the collective name for a number of POWERLINK building blocks implemented in VHDL for synthesis in an FPGA of your choice. Functionalities include• DLL state machine• PDO mapping• Flying Managing Node implementation• Redundant media arbitration• Multi-port hub• PDO monitoring and event generationAll high-performance POWERLINK applications use some form of hardware acceleration. This is because they require• Fast and invariable cycle and response times• Lowest possible load on system controller• Event driven applications• Functionalities not efficiently implementable in software• Customizable and configurable hardware• Multiple hubs• Redundancy solutions